Related Pages
Everything about Digitizer
DT5560SE
32-channel 14-bit 125 MS/s desktop digitizer with open FPGA architecture and programmable analog front-end for flexible data acquisition in laboratory environments.
Read More
R5560SE
128-channel 14-bit 125 MS/s digitizer with single-ended inputs and open FPGA architecture for customizable data acquisition.
Read More
R5560
128-channel 14-bit 125 MS/s digitizer with open FPGA and multi-detector support for large-scale experiments.
Read More
Neural Network Pile-Up Resolution
The Super-MuSR spectrometer leverages a 1D convolutional neural network embedded in FPGA to resolve event pile-up in real time, outperforming classical deconvolution and enabling robust hit identification at gigacount rates.
Read More
LEM - Low Energy Module
The Low Energy Module (LEM) is a compact, high-precision particle spectrometer developed for the NUSES satellite to detect low-energy protons and electrons in low Earth orbit. The detector employs a hybrid readout system combining silicon PIPS sensors and plastic scintillators with SiPMs, supported by a powerful onboard DAQ and FPGA firmware, enabling high-rate histogram and list mode acquisition.
Read More
ISIS HiFi muon spectromenter DAQ upgrade
As part of the ongoing enhancement of the HiFi spectrometer at ISIS, Nuclear Instruments integrated the DAQ121—our high-speed, 1 Gsps, 12-bit digitizer—into the data acquisition chain alongside the legacy TDC system. This hybrid configuration enables advanced digital discrimination of PMT signals and real-time pile-up deconvolution, increasing temporal resolution and system flexibility for high-rate muon experiments.
Read More
20-bit Interleaved ADC for Direct Sampling in X-ray Spectroscopy
A novel 20-bit interleaved SAR ADC architecture enables direct digitization of preamplifier signals in high-rate X-ray spectroscopy applications. It eliminates analog reshaping stages while achieving sub-150 eV resolution at MHz-level event rates. Designed around a Zynq SoC and tested with the ARDESIA detector, the system demonstrates a robust, low-noise digital pipeline tailored for synchrotron environments and pixelated SDDs.
Read More
