Complete Readout System based on Weeroc ASIC


The DT5550W is a development and DAQ platform with programmable FPGA designed to read out Weeroc ASICs. The DT5550W can be used either as evaluation system for WeeROC ASICs, either as full featured Acquisition System supporting a wide range of SiPM detectors.

The full system is composed by two boards: a motherboard with an FPGA, USB 3.0 connectivity, power supply and ADCs, and a replaceable piggyback board that hosts 1,2 or 4 Weeroc ASICs, detector connectors and high voltage power supply (if using SiPMs).

The DT5550W has an onboard 14-bit 80 MS/s simultaneous sampling ADC, to monitor and acquire the analog outputs of the ASICs.

A default firmware is provided for each supported piggyback board, allowing the user to read-out the ASICs and perform energy and time measurements with the supported detectors.

The DT5550W includes the license for SCI-Compiler, a graphic tool for Windows which allows the user to realize a custom readout logic for the available ASICs. This tool allows to generate the VHDL firmware code starting only from graphical blocks which can be connected together in the GUI, thus reducing the development time also for non-expert firmware designers.

  • Comprehensive Programmable Board based on Weeroc ASICs
  • Available with Petiroc and Citiroc ASICs for SiPM Readout
  • Single Desktop Unit available in 32, 64, and 128-channel configurations
  • On-board Power Supply for SiPM Bias (20-85 V)
  • Cross-board synchronization for System-building and readout of large SiPM Arrays
  • Ideally suited for energy calculation in SiPM-based imaging and spectroscopy applications
  • Petiroc version is the perfect solution for highly accurate SiPM time-of-flight applications (Intrinsic 37ps timing resolution)
  • Strip adapter (2.54mm pitch) included for easy connection to any type of SiPM matrix or array
  • Optional remotization kit for Hamamatsu 64-channel SiPM matrix, with 2-meters microcoaxial cable
  • Open-FPGA Capability via Sci-Compiler software, a graphical development platform for quick, user-friendly FPGA programming
  • Includes SCI-5550W Readout Software for DAQ Management and ASIC Configuration
  • 80MS/s, 14bit ADC
  • Clock-In/Clock-Out (LEMO Connectors) for multi-board sync
  • 8 General Purpose Programmable I/O (LEMO Connectors) for DAQ Control Signals (external trigger, busy, veto, etc…)
  • USB 3.0 supports fast data transfer


The Windows software is available for free and distributed in open source format. The software is written in VB.NET 2015 and it is very easy to costumize.

The software is able to configure and readout two PetiROC ASICs.
The intuitive GUI allows the user to:

  • Configure the two PetiROC chip
  • Dump on file all data in output of PetiROC ASIC in binary format or decoded in easy-to-read JSON format
  • Execute realtime plot of:
    • Image View both in single frame shot and cumulative image
    • Energy Spectrum for each channels
    • Time distribution in respect of one channels (assumed as T0)

This product is sold with CAEN

Additional information

Analog Input


Digital Conversion

Internal ASIC ADC or external 80 MS/s, 14-bit ADC

Clock Generation

Clock source: internal/external

On-board programmable PLL provides generation of the main board clocks from an internal (25 MHz local Oscillator) or external (CLK-IN connector) reference

LEMO Digital I/O

Zin = 50 Ohm
Single-ended, 25 MHz, 3.3V
Rt = 50 Ohm
Single-ended, 25 MHz, 3.3V, 50mA
GPIO 1..8 (LEMO)
General purpose programmable digital I/Os Single-ended, Zin/ Rt= 50 Ohm


Common FIFO buffer


Trigger Source
Internal/External: managed by the default firmware Complex trigger logic: implementable by the user on the open FPGA

Trigger Propagation
Through programmable LEMO GPIO 1-8

Timing Resolution

Default FW
– Digital Readout: refer to the ASIC datasheet
– Analog Readout: 12.5 ns
– Counting/TDC mode : 2 ns
Custom FW
– Digital Readout: refer to the ASIC datasheet


Clock Propagation
– LEMO CLOCK IN/OUT connectors
Acquisition Synchronization
– Through programmable LEMO GPIO 1-8


Xilinx XC7K160T (Kintex-7 family)

Communication Interface

USB 3.0
USB 2.0 back compatibility
Up to 240 MB/s transfer rate


Basic ASICs readout
Use SCI-Compiler to develop your own firmware (LICENSE INCLUDED)