- High channel density: 64-channel, 125MS/s 16-bit ADC with individual DC offset adjustment.
- Digital pulse processing and waveform recording of 64 independent detectors.
- High-resolution Nuclear Spectroscopy: multiport MCA operating in PHA, QDC*, PSD* modes.
- Open FPGA architecture for pulse analysis algorithm customization, SCI-Compiler support is Coming Soon.
- Available in VME64, VME64X and Desktop form factors.
- Easy synchronization of multiple units.
- Front panel readout via USB-3.0, 1/10* GbE or Optical link (CONET2*).
- Use-friendly readout software for multiparametric spectroscopy (CoMPASS) or waveform recording (WaveDump2).
- SCI-Compiler firmware generator support is Coming Soon.
- Onboard Zynq® UltraScale+™ MPSoC integrating an Arm®-based CPU running Linux®.
The 2740 Digitizer is a 64-channel digital signal processor for radiation detectors available in VME64 (V2740), VME64X (VX2740), and Desktop (DT2740) form factor. It offers not only waveform digitization and recording but also Multi-Channel Analysis for nuclear spectroscopy using Silicon strip, segmented HPGe, Scintillation detector with PMTs, Wire Chambers, and others. The 2740 can perform pulse height measurements (PHA), constant fraction timing (CFD), charge integration (QDC) and pulse shape discrimination (PSD) independently for each of the 64 channels.
Analog input channels are provided differential (on 2740 versions) or single-ended (on 2740B versions). Each channel of the module digitizes the analog input, that can be the signal coming from a physics detector, with a 16 bit, 125 MS/s ADC. The sampled data are used to initiate the digital pulse processing sequence, managed in the FPGA at the firmware level. Different firmware types can be selected via software, according to the specific setup and acquisition mode.
- Common trigger: all channels acquire simultaneously with a common trigger. The trigger can be fed externally or generated by a combination of individual channel discriminators. This mode is mainly intended for the acquisition of waveforms, like a digital oscilloscope. Options for zero suppression are available to remove not significant data.
- Independent trigger: suited for trigger-less applications, where no global trigger is needed but each channel acquires waveforms upon its self-trigger which fires through a digital discriminator, independently of the others.
- DPP: real-time processing in the FPGA allows for the extraction of physical parameters from the waveform (e.g. pulse height, charge, timestamp, PSD), well suited for high counting rate applications. It is yet possible to save both raw waves and parameters.
A template of the firmware is available for customers who want to personalize the acquisition to implement custom algorithms for pulse processing in the open FPGA. The user can have control of the data output information and customize the trigger logic to get several combinations of self-triggers and I/O signals to validate or discard the events.
Custom software can run on the onboard CPU for data reduction and analysis.
Interfaces & I/O
An USB-3.0 (tested up to 280 MB/s) type C links are provided in all form factors for an easy data readout.
Ethernet or Optical Link
An SFP+ receptacle for 1/10 GbE (tested up to 110 MB/s @1G) Copper RJ-45 or Optical links (50/125μm OM2 or OM3 fiber) is available in any form factor for high performance data readout. It is possible to connect up to 8 ADC modules to a single Optical Link Controller (Mod. A4818) through CAEN proprietary daisy-chainable CONET2 communication protocol.
Digital I/Os are provided for individual trigger propagation to external trigger logic. This feature allow to scale up the acquisition channels where a global trigger generation is mandatory.
The 2740 Digitizer can manage the entire acquisition chain, from the input signal sampling in the ADC to the processing of the signal and readout. Thanks to the open FPGA, it is possible to customize the firmware for pulse processing, while the Arm hosted onboard permits writing custom software. These features allow obtaining a highly compact and flexible readout module that can be tailored to different types of applications: nuclear spectroscopy with segmented germanium detectors, readout of Silicon strips, waveform capture for gamma-ray tracking, sub-ns timing measurements are among the possibilities.
For those users who do not need to customize the digital pulse processing, we provide standard firmware and software for:
- Waveform recording using common-trigger
- Energy Spectrum recording using PHA (QDC, PSD, etc.) mode
- Pulse Shape Discrimination
- Sub-ns timing measurements using digital CFD
- Advanced Waveform readout using ZLE (Zero Length Encoding) or DAW (Dynamic Acquisition Window)
CAEN provides two ready-to-use user-friendly readout software: WaveDump2 for waveform recording using common-trigger firmware and CoMPASS, a multiparametric DAQ software to manage the other Digital Pulse Processing algorithms. Multiple boards can even be managed providing a simultaneous plot of waveforms and other quantities of interest.
Wavedump2 software specifically supports the Scope firmware of the 274x Open FPGA Digitizers for waveform recording applications. Data acquisition from multiple boards and multi-board synchronized systems are managed through a dedicated toolbar
- Multi-board management
- Simultaneous plot of waveforms from up to 8 input channels
- Flexible and easy configuration of channel and trigger settings
- FFT analysis
CoMPASS multiparametric software
CAEN Multi-Parameter Spectroscopy Software (CoMPASS) is the DAQ software from CAEN able to implement a Multiparametric Data Acquisition for Physics Applications: the detectors can be connected directly to the digitizers/MCAs inputs and the software acquires energy, timing, and PSD spectra at the same time.
- Simultaneous plot of waveforms, Time, Energy, PSD, and TOF spectra
- Online filtering (Time, Energy, PSD)
- Multi-board management
- Advanced data saving
The 2740 digitizer family can be programmed throught the SCI-Compiler software for easy-FPGA programming. It is a block-diagram-based graphic tool, thought to help non-expert VHDL coders in building their own firmware.
Each block defines an operational function (like a logic port, a trigger, a discriminator, a counter …) and more blocks can be wired together to build a complex FPGA code, so that it is possible to speed up the programming effort and get quickly to the testing and using phase.
This product is sold with CAEN