SciCompiler tools library include almost 200 cores that can be connected together in order to implement a complex readout and real-time processing chain. It is easy like connect cables of real scientific and laboratory instruments
Sci-Compiler does not limits to generate VHDL code and compile the realtime FPGA project. Sci-Compiler will help you in the full design cycle of your readout system.
For each virtual block that has readout capabilities, for example oscilloscope, spectrum block, imaging readout block, logic analyser, registers, etc. Sci-Compiler will automatically generate a C function to directly access to the resource at a very high level.